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september 2009 doc id 10632 rev 8 1/19 19 54vcxh162245 rad hard low voltage cmos 16-bit bus buffer transceiver (3-state) with 3.6 v tole rant inputs and outputs features 1.65 to 3.6 v inputs and outputs high speed a outputs: ?t pd = 3.4 ns at v cc = 3.0 to 3.6 v ?t pd = 4.3 ns at v cc = 2.3 to 2.7 v symmetrical impedance a output: ?|i oh | = i ol = 12 ma (min.) at v cc = 3.0 v ?|i oh | = i ol = 8 ma (min.) at v cc = 2.3 v high speed b outputs: ?t pd = 2.5 ns (max.) at v cc = 3.0 to 3.6 v ?t pd = 3.2 ns (max.) at v cc = 2.3 to 2.7 v symmetrical impedance a output: ?|i oh | = i ol = 24 ma (min.) at v cc = 3.0 v ?|i oh | = i ol = 18 ma (min.) at v cc = 2.3 v power down protection on inputs and outputs 26 serie resistors in a port output operating voltage range: ?v cc (opr) = 1.65 v to 3.6 v pin and function compatible with 54 series h162245 bus hold provided on both sides cold spare function latch-up performance exceeds 300 ma (jesd 17) esd performance: ? hbm > 2000 v (mil std 883 method 3015); mm > 200 v 300 krad mil1019.6 condition a, (rha qml qualification extension undergone) no sel, no seu and no set under 110 mev/cm2/mg let heavy ions irradiation qml qualified product device fully compliant with dscc smd 5962-02508 100 mv typical input hysteresis description the 54vcxh162245 is a low voltage cmos 16 bit bus transceiver (3-state) fabricated with sub- micron silicon gate and five-layer metal wiring c 2 mos technology. it is ideal for low power and very high speed 1.65 to 3.6 v applications; it can be interfaced to 3.6 v signal environment for both inputs and outputs. this ic is intended for two-way asynchronous communication between data buses; the direction of data transmission is determined by dir input. the two enable inputs ng can be used to disable the device so that the buses are effectively isolated. the device circuits is including 26 series resistance in the a port outputs. these resistors permit to reduce line noise in high speed applications. bus hold on data inputs is provided in order to eliminate the need for external pull-up or pull-down resistor. all inputs and outputs are equipped with protection circuits against static discharge, giving them 2 kv esd immunity and transient excess voltage. all floating bus terminals during high z state must be held high or low. flat-48 www.st.com
contents 54vcxh162245 2/19 doc id 10632 rev 8 contents 1 logic symbols and i/o equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . 3 2 pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.3 truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.1 recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 8 order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
54vcxh162245 logic symbols and i/o equivalent circuit doc id 10632 rev 8 3/19 1 logic symbols and i/o equivalent circuit figure 1. iec logic symbols figure 2. input and output equivalent circuit
pin settings 54vcxh162245 4/19 doc id 10632 rev 8 2 pin settings 2.1 pin connection figure 3. pin connection (top through view)
54vcxh162245 pin settings doc id 10632 rev 8 5/19 2.2 pin description 2.3 truth table note: x = do not care; z = high impedance table 1. pin description pin n symbol name and function 1 1dir directional control 2, 3, 5, 6, 8, 9, 11, 12 1b1 to 1b8 data inputs/outputs 13, 14, 16, 17, 19, 20, 22, 23 2b1 to 2b8 data inputs/outputs 24 2dir directional control 25 2g output enable input 36, 35, 33, 32, 30, 29, 27, 26 2a1 to 2a8 data inputs/outputs 47, 46, 44, 43, 41, 40, 38, 38 1a1 to 1a8 data inputs/outputs 48 1g output enable input 4, 10, 15, 21, 28, 34, 39, 45 gnd ground (0 v) 7, 18, 31, 42 v cc positive supply voltage table 2. truth table inputs function output g dir a bus b bus yn l l output input a = b l h input output b = a hxzzz
maximum rating 54vcxh162245 6/19 doc id 10632 rev 8 3 maximum rating stressing the device above the rating listed in the ?absolute maximum ratings? table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not imp lied. exposure to absolute ma ximum rating conditions for extended periods may affect device reliability. table 3. absolute maximum ratings symbol parameter value unit v cc supply voltage -0.5 to +4.6 v v i dc input voltage -0.5 to +4.6 v v o dc output voltage (off state) -0.5 to +4.6 v v o dc output voltage (high or low state) (1) 1. i o absolute maximum rating must be observed -0.5 to v cc + 0.5 v i ik dc input diode current - 50 ma i ok dc output diode current (2) 2. v o < gnd, v o > v cc - 50 ma i o dc output current 50 ma i cc or i gnd dc v cc or ground current per supply pin 100 ma p d power dissipation 400 mw t stg storage temperature -65 to +150 c t l lead temperature (10 sec) 260 c
54vcxh162245 maximum rating doc id 10632 rev 8 7/19 3.1 recommended operating conditions table 4. recommended operating conditions symbol parameter value unit v cc supply voltage 1.8 to 3.6 v v i input voltage -0.3 to 3.6 v v o output voltage (off state) 0 to 3.6 v v o output voltage (high or low state) 0 to v cc v i oh , i ol high or low level output current - a side (v cc = 3.0 to 3.6 v) 12 ma i oh , i ol high or low level output current - a side (v cc = 2.3 to 2.7 v) 8ma i oh , i ol high or low level output current - b side (v cc = 3.0 to 3.6 v) 24 ma i oh , i ol high or low level output current - b side (v cc = 2.3 to 2.7 v) 18 ma t op operating temperature -55 to 125 c dt/dv input rise and fall time (1) 1. v in from 0.8 v to 2 v at v cc = 3.0 v 0 to 10 ns/v
electrical characteristics 54vcxh162245 8/19 doc id 10632 rev 8 4 electrical characteristics 2.7 v < v cc < 3.6 v unless otherwise specified. table 5. dc specifications symbol parameter test condition value unit v cc (v) -55 to 125 c min. max. v ih high level input voltage 2.7 to 3.6 2.0 v v il low level input voltage 0.8 v oh high level output voltage (a outputs) 2.7 to 3.6 i o =-100 av cc -0.2 v 2.7 i o =-6 ma 2.2 3.0 i o =-8 ma 2.4 i o =-12 ma 2.2 v oh high level output voltage (b outputs) 2.7 to 3.6 i o =-100 av cc -0.2 v 2.7 i o =-12 ma 2.2 3.0 i o =-18 ma 2.4 i o =-24 ma 2.2 v ol low level output voltage (a outputs) 2.7 to 3.6 i o =100 a0.2 v 2.7 i o =6 ma 0.4 3.0 i o =8 ma 0.55 i o =12 ma 0.8 v ol low level output voltage (b outputs) 2.7 to 3.6 i o =100 a0.2 v 2.7 i o =12 ma 0.4 3.0 i o =18 ma 0.4 i o =24 ma 0.55 i i input leakage current 2.7 to 3.6 v i = 0 to 3.6 v 5 a i i(hold) input hold current 3.0 v i = 0.8 v 75 a v i = 2 v -75 3.6 v i = 0 to 3.6 v 500 i off power off leakage current 0v i or v o = 0 to 3.6 v 10 a i oz high impedance output leakage current 2.7 to 3.6 v i = v ih or v il v o = 0 to 3.6 v 10 a i cc quiescent supply current 2.7 to 3.6 v i = v cc or gnd 20 a v i or v o = v cc to 3.6 v 20 i cc i cc incr. per input 2.7 to 3.6 v ih = v cc - 0.6 v 750 a
54vcxh162245 electrical characteristics doc id 10632 rev 8 9/19 2.3 v < v cc < 2.7 v unless otherwise specified. table 6. dc specifications symbol parameter test condition value unit v cc (v) -55 to 125 c min. max. v ih high level input voltage 2.3 to 2.7 1.6 v v il low level input voltage 0.7 v oh high level output voltage 2.3 to 2.7 i o =-100 av cc -0.2 v 2.3 i o =-4 ma 2.0 i o =-6 ma 1.8 i o =-8 ma 1.7 v ol low level output voltage 2.3 to 2.7 i o =100 a0.2 v 2.3 i o =6 ma 0.4 i o =8 ma 0.6 i i input leakage current 2.3 to 2.7 v i = v cc or gnd 5 a i i(hold) input hold current 2.3 v i = 0.7 v 45 a v i = 1.7 v -45 i off power off leakage current 0v i or v o = 0 to 3.6 v 10 a i oz high impedance output leakage current 2.3 to 2.7 v i = v ih or v il v o = 0 to 3.6 v 10 a i cc quiescent supply current 2.3 to 2.7 v i = v cc or gnd 20 a v i or v o = v cc to 3.6v 20
electrical characteristics 54vcxh162245 10/19 doc id 10632 rev 8 t a = 25 c, input t r = t f = 2.0 ns, c l = 30 pf, r l = 500 table 7. dynamic switching characteristics symbol parameter test condition value unit v cc (v) t a = 25 c min. typ. max. v olp dynamic peak low voltage quiet output (1) (2) (a to b) 1. number of outputs defined as ?n?. measured with ?n -1? outputs switching from high to low or low to high. the remaining output is measured in the low state. 2. parameters guaranteed by design. 2.5 v il = 0v v ih = v cc -0.6- v 3.3 - 0.8 - v olp dynamic peak low voltage quiet output (1) (2) (b to a) 2.5 v il = 0v v ih = v cc -0.25- v 3.3 - 0.35 - v olv dynamic valley low voltage quiet output (1) (2) (a to b) 2.5 v il = 0v v ih = v cc --0.6- v 3.3 - -0.8 - v olv dynamic valley low voltage quiet output (1) (2) (b to a) 2.5 v il = 0v v ih = v cc - -0.25 - v 3.3 - -0.35 - v ohv dynamic valley high voltage quiet output (2) (3) (a to b) 3. number of outputs defined as ?n?. measured with ?n -1? outputs switching from high to low or low to high. the remaining output is measured in the high state. 2.5 v il = 0v v ih = v cc -1.9- v 3.3 - 2.2 - v ohv dynamic valley high voltage quiet output (2) (3) (b to a) 2.5 v il = 0v v ih = v cc -2.05- v 3.3 - 2.65 -
54vcxh162245 electrical characteristics doc id 10632 rev 8 11/19 c l = 30 pf, r l = 500 , input t r = t f = 2.0 ns table 8. ac electrical characteristics symbol parameter test condition value unit v cc (v) -55 to 125 c min. max. t plh t phl propagation delay time (a to b) 2.3 to 2.7 1.0 4.0 ns 3.0 to 3.6 0.8 3.6 t plh t phl propagation delay time (b to a) 2.3 to 2.7 1.0 4.9 ns 3.0 to 3.6 0.8 4.0 t pzl t pzh output enable time (a to b) 2.3 to 2.7 1.0 5.8 ns 3.0 to 3.6 0.8 4.3 t pzl t pzh output enable time (b to a) 2.3 to 2.7 1.0 6.8 ns 3.0 to 3.6 0.8 4.8 t plz t phz output disable time (a to b) 2.3 to 2.7 1.0 4.8 ns 3.0 to 3.6 0.8 5.6 t plz t phz output disable time (b to a) 2.3 to 2.7 1.0 5.7 ns 3.0 to 3.6 0.8 7.0 t oslh t oshl output to output skew time (1) (2) 1. skew is defined as the absolute value of the di fference between the actual propagation delay for any two outputs of the same device switching in the same direction, either high or low (t oslh = | t plhm - t plhn |, t oshl = | t phlm - t phln |) 2. parameter guaranteed by design 2.3 to 2.7 0.5 ns 3.0 to 3.6 0.5 table 9. capacitive characteristics symbol parameter test condition value unit v cc (v) t a = 25 c min. typ. max. c in input capacitance 2.5 or 3.3 v in = 0 or v cc -4-pf c out output capacitance 2.5 or 3.3 v in = 0 or v cc -8-pf c pd power dissipation capacitance (1) 1. c pd is defined as the value of the ic?s internal equivalent capacitance whic h is calculated from the operating current consumption without load. (refer to test circuit) . average operating current can be obtained by the following equation. i cc(opr) = c pd x v cc x f in + i cc /16 (per circuit) 2.5 or 3.3 f in = 10 mhz v in = 0 or v cc -28-pf
test circuit 54vcxh162245 12/19 doc id 10632 rev 8 5 test circuit figure 4. test circuit c l = 30 pf or equivalent (includes jig and probe capacitance) r l = r 1 = 500 or equivalent r t = z out of pulse generator (typically 50 ) table 10. test circuit test switch t plh , t phl open t pzl , t plz (v cc = 3.0 to 3.6 v) 6v t pzl , t plz (v cc = 2.3 to 2.7 v) 2v cc t pzh , t phz gnd
54vcxh162245 waveforms doc id 10632 rev 8 13/19 6 waveforms figure 5. waveform - propagation delay (f = 1 mhz; 50% duty cycle) table 11. waveform symbol value symbol v cc 3.0 to 3.6 v 2.3 to 2.7 v v ih 2.7v v cc v m 1.5v v cc /2 v x v ol +0.3v v ol +0.15v v y v oh -0.3v v oh -0.15v
waveforms 54vcxh162245 14/19 doc id 10632 rev 8 figure 6. waveform - output enable and disable time (f = 1 mhz; 50% duty cycle)
54vcxh162245 package mechanical data doc id 10632 rev 8 15/19 7 package mechanical data 54vcxh162245 products are supplied into ceramic body / metal lid hermetic flat 48-pin space package in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. table 12. flat-48 (mil-std-1835) mechanical data dim. mm inch min. typ. max. min. typ. max. a 2.18 2.47 2.72 0.086 0.097 0.107 b 0.20 0.254 0.30 0.008 0.010 0.012 c 0.12 0.15 0.18 0.005 0.006 0.007 d 15.57 15.75 15.92 0.613 0.620 0.627 e 9.52 9.65 9.78 0.375 0.380 0.385 e2 6.22 6.35 6.48 0.245 0.250 0.255 e3 1.52 1.65 1.78 0.060 0.065 0.070 e 0.635 0.025 f 0.20 0.008 l 6.85 8.38 9.40 0.270 0.330 0.370 q 0.66 0.79 0.92 0.026 0.031 0.036 s1 0.25 0.43 0.61 0.010 0.017 0.024
package mechanical data 54vcxh162245 16/19 doc id 10632 rev 8 figure 7. package dimension 7330585b
54vcxh162245 order codes doc id 10632 rev 8 17/19 8 order codes table 13. ordering information package min op. voltage lead finish radiation level flight models engineering model packing qml-v 48-pin flat 1.8 v gold plated 300 krad rhfxh162245k03v rhrxh162245k1 conductive strip pack
revision history 54vcxh162245 18/19 doc id 10632 rev 8 9 revision history table 14. document revision history date revision changes 06-jul-2004 1 first release 19-jul-2004 2 data on range -40 to 85c removed on tables 6, 7, 8, 9. 17-may-2005 3 mechanical data has been updated. 19-jun-2006 4 300 krad bullet updated, new template, mechanical data updated 11-apr-2007 5 updated coverpage features 27-jul-2007 6 typo in table 12 on page 15 17-sep-2008 7 updated cover page 23-sep-2009 8 updated table 13 on page 17
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